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Latest Updates
Admissions for Embedded System and VLSI Design at College of Engineering, Thalassery are now open for 2025-26 session. The institute offers excellent placement opportunities, experienced faculty, and state-of-the-art infrastructure. Check eligibility criteria, fee structure, and application deadlines for more details.
Table of Contents
Master of Engineering in Embedded System And Vlsi Design at CET Thalassery 2025 Highlights
Duration | 2 Years |
Total Seats | 18 |
Mode | Offline |
Eligibility | Graduation + GATE |
College of Engineering, Thalassery Master of Engineering in Embedded System And Vlsi Design Fee Structure 2025
The fee structure for Master of Engineering in Embedded System And Vlsi Design at College of Engineering, Thalassery includes tuition fees, hostel fees, and other charges. The total cost varies by year.
| Instalments | Tuition Fee | Hostel (Optional) | Total Cost |
|---|---|---|---|
| Year 1 | ₹24,000 | ₹26,400 | ₹50,400 |
| Year 2 | ₹24,000 | ₹26,400 | ₹50,400 |
Total Fee | ₹1.01 Lakhs |
College of Engineering, Thalassery Master of Engineering in Embedded System And Vlsi Design Admission Dates
| Admission Process | Dates |
|---|---|
| GATE 2026 Notification | 05 Aug 2025 |
| GATE 2026 Notification | 05 Aug 2025 |
| GATE 2026 Registration Date | 28 Aug 2025 |
| GATE 2026 Registration Date | 28 Aug 2025 |
| GATE 2026 Admit Card Date | 07 Jan 2026 |
College of Engineering, Thalassery Placement Statistics
College of Engineering, Thalassery offers placements for all levels of students. It has a separate placement cell that conducts the final campus placement activities. Note: These are college-wide statistics as specialization-specific placement data is not available.
Highest Package (2025) | ₹1 Lakhs |
Companies Visited | 17 |
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